wRTOS supports and saves state information for AVX/AVX2 (YMM0~YMM15), AVX512 (ZMM0~ZMM31), AMX, SSE (SSE/SSE2/SSE3/SSE4), and MMX registers. This support provides many benefits, including the following:
- wRTOS can inter-operate with any processes that use the AVX/AVX2 (YMM0~YMM15), AVX-512 (ZMM0~ZMM31), AMX, SSE (SSE/SSE2/SSE3/SSE4), and MMX registers.
- RTSS applications can use Microsoft Visual Studio's intrinsic functions for accessing the AVX (YMM0~YMM15), AVX2, AVX-512 (ZMM0~ZMM31), AMX, SSE (SSE/SSE2/SSE3/SSE4), and MMX technologies.
- RTSS applications can use the Intel intrinsic functions for accessing the AVX/AVX2 (YMM0~YMM15), AVX-512 (ZMM0~ZMM31), AMX, SSE (SSE/SSE2/SSE3/SSE4), and MMX technologies.
- RTSS application can use Assembly code for accessing the AVX/AVX2 (YYMM0~YMM15), AVX-512 (ZMM0~ZMM31), AMX, SSE (SSE/SSE2/SSE3/SSE4), and MMX technologies.
For more information on AVX, SSE, and MMX-related technologies, see https://learn.microsoft.com/en-us/previous-versions/visualstudio/visual-studio-2010/e9b52ceh(v=vs.100)?redirectedfrom=MSDN.
IMPORTANT: Not all features supported by a processor may be enabled on the system. Using a feature that is not enabled may result in exceptions or undefined behavior. Use RtGetEnabledXStateFeature to determine processor capabilities before using AVX/AVX2 (YMM0~YMM15), AVX-512 (ZMM0~ZMM31), AMX, SSE (SSE/SSE2/SSE3/SSE4), and MMX registers.
Moving Threads Using AVX, AMX, SSE, and MMX
Threads using AVX/AVX2, AVX-512, AMX, SSE, or MMX registers can be moved from one processor to another until the first floating point, AVX/AVX2, AVX-512, AMX, SSE, or MMX instruction is made, after which they cannot be moved.
AVX and SSE Exceptions
wRTOS supports the following AVX and SSE exceptions:
- _MM_EXCEPT_INVALID
- _MM_EXCEPT_DIV_ZERO
- _MM_EXCEPT_DENORM
- _MM_EXCEPT_OVERFLOW
- _MM_EXCEPT_UNDERFLOW
- _MM_EXCEPT_INEXACT
These exceptions must be unmasked before they can be used. For more information, see https://learn.microsoft.com/en-us/previous-versions/visualstudio/visual-studio-2010/e9b52ceh(v=vs.100)?redirectedfrom=MSDN.
AVX and SSE exceptions are controlled by the SIMD status and control register. For information on macro functions that allow for reading/writing bits from this control register, see https://learn.microsoft.com/en-us/previous-versions/visualstudio/visual-studio-2010/34zdf63y(v=vs.100)?redirectedfrom=MSDN.
AVX/AVX2, AVX-512, and SSE Compiler Support
wRTOS supports both Intel assembly commands and compiler intrinsic AVX/AVX2 and AVX-512 routines and SSE, AVX/AVX2, and AVX-512 compiler flags through Visual Studio. For more information, see Chapter 5 in the Intel® Advanced Vector Extensions Programming Reference.
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