AVX, SSE, and MMX Support

RTX64 supports and saves state information for AVX/AVX2 (YMM0~YMM15), SSE (SSE/SSE2/SSE3/SSE4), and MMX registers. This support provides a number of benefits, including the following:

• RTX64 can inter-operate with any processes that use the AVX/AVX2 (YMM0~YMM15), AVX-512, SSE (SSE/SSE2/SSE3/SSE4), and MMX registers.
• RTSS applications can use Microsoft Visual Studio's intrinsic functions for accessing the AVX (YMM0~YMM15), AVX2, AVX-512, SSE (SSE/SSE2/SSE3/SSE4), and MMX technologies.
• RTSS applications can use the Intel intrinsic functions for accessing the AVX/AVX2 (YMM0~YMM15), AVX-512, SSE (SSE/SSE2/SSE3/SSE4), and MMX technologies.
• RTSS application can use Assembly code for accessing the AVX/AVX2 (YMM0~YMM15), AVX-512, SSE (SSE/SSE2/SSE3/SSE4), and MMX technologies.

For more information on AVX, SSE, and MMX-related technologies, see http://msdn.microsoft.com/en-us/library/y0dh78ez%28v=VS.100%29.aspx.

IMPORTANT! Not all features supported by a processor may be enabled on the system. Using a feature which is not enabled may result in exceptions or undefined behavior. Use RtGetEnabledXStateFeature to determine processor capabilities before using AVX/AVX2 (YMM0~YMM15), AVX-512, SSE (SSE/SSE2/SSE3/SSE4), and MMX registers.

Moving Threads Using AVX, SSE, and MMX

Threads using AVX/AVX2, AVX-512, SSE, or MMX registers can be moved from one processor to another until the first floating point, AVX/AVX2, AVX-512, SSE, or MMX instruction is made, after which they cannot be moved.

AVX and SSE Exceptions

RTX64 supports the following AVX and SSE exceptions:

• _MM_EXCEPT_INVALID
• _MM_EXCEPT_DIV_ZERO
• _MM_EXCEPT_DENORM
• _MM_EXCEPT_OVERFLOW
• _MM_EXCEPT_UNDERFLOW
• _MM_EXCEPT_INEXACT

These exceptions must be unmasked before they can be used. For more information, see http://msdn.microsoft.com/en-us/library/e9b52ceh%28v=VS.100%29.aspx.

AVX and SSE exceptions are controlled by the SIMD status and control register. For information on macro functions that allow for reading/writing bits from this control register, see http://msdn.microsoft.com/en-us/library/34zdf63y.aspx.

AVX/AVX2 , AVX-512, and SSE Compiler Support

RTX64 supports both Intel assembly commands as well as compiler intrinsic AVX/AVX2 and AVX-512 routines. RTX64 also supports SSE and AVX/AVX2 and AVX-512 compiler flags through Visual Studio.

For more information on assembly commands and compiler intrinsic routines, see Chapter 5 in the Intel® Advanced Vector Extensions Programming Reference.