MultiVectorI350
Description
Provides an example of using Message Signaled Interrupts (MSI-X) with multiple vectors attachment on Intel Ethernet Controller I350 with Dual or Quad ports.
The program generates multiple interrupts by setting extended interrupt cause register. The interrupts are evenly distributed within the affinity mask of the calling process. The program checks the calling counts of interrupt handling routines run by multiple IST to make sure there is no interrupt loss. The program also measures the latencies from the setting of interrupt events to IST handling.
NOTE: This test takes control of the Network Interface Card (NIC) independent of the RT-TCP/IP Stack. To run correctly, the RT-TCP/IP Stack should not use the NIC (i.e., it should be disabled if it is in the list of interfaces managed by the RT-TCP/IP Stack). If the RT-TCP/IP Stack is using the NIC when this test is run, you will see the following error: WARNING: Attach multiple vector interrupts failed, error 1119
Source Files
| File | Description |
|---|---|
MultiVectorI350.c
|
Main source file. |
MultiVectorI350.h
|
Header file. |
Remarks
- Each port of the Intel Ethernet Controller I350 needs to be converted from a Windows hardware device to RTX64 control. See Converting a Windows Device to an RTX64 Device for more information.
Usage
MultiVectorI350.rtss <Number of Ports> <Number of Queues> <Fire Interrupts Together> <Loop Count>
Number of Ports: Integer specifying how many ports to test (1-4). Default value is 4.
Number of Ports: Integer specifying how many receive/transmit queue pairs per port to test (0-4). Default value is 0 (auto – allow the program to decide based on free vectors and messages).
Fire Interrupts Together: Integer specifying how to fire multiple interrupts. 0 – fire separate, 1 – fire together. Default value is 0.
Loop Count: Integer specifying the number of times the loop is to be performed. Default value is 10000.
Example
This example is for a quad-port I350 card using two queue pairs on each port and firing interrupts separately. In this scenario, we use the following command line syntax:
Rtssrun MultiVectorI350.rtss 4 2 0 10000
Output
MultiVectorI350 test started Number of Ports = 4, Number of Queues = auto, Fire Interrupts Together = 0, Loop Count = 10000 MultiVectorI350 test: PASS! Port #0, Vector #0, Core # 2, IST Latency: Maximum 3 (us), Average 2 (us) Port #0, Vector #1, Core # 3, IST Latency: Maximum 4 (us), Average 2 (us) Port #0, Vector #2, Core # 4, IST Latency: Maximum 8 (us), Average 2 (us) Port #0, Vector #3, Core # 5, IST Latency: Maximum 8 (us), Average 2 (us) Port #0, Vector #4, Core # 6, IST Latency: Maximum 11 (us), Average 2 (us) Port #0, Vector #5, Core # 7, IST Latency: Maximum 12 (us), Average 2 (us) Port #0, Vector #6, Core # 2, IST Latency: Maximum 3 (us), Average 2 (us) Port #0, Vector #7, Core # 3, IST Latency: Maximum 8 (us), Average 2 (us) Port #0, Vector #8, Core # 4, IST Latency: Maximum 12 (us), Average 2 (us) Port #1, Vector #0, Core # 2, IST Latency: Maximum 3 (us), Average 2 (us) Port #1, Vector #1, Core # 3, IST Latency: Maximum 4 (us), Average 2 (us) Port #1, Vector #2, Core # 4, IST Latency: Maximum 8 (us), Average 2 (us) Port #1, Vector #3, Core # 5, IST Latency: Maximum 8 (us), Average 2 (us) Port #1, Vector #4, Core # 6, IST Latency: Maximum 11 (us), Average 2 (us) Port #1, Vector #5, Core # 7, IST Latency: Maximum 12 (us), Average 2 (us) Port #1, Vector #6, Core # 2, IST Latency: Maximum 3 (us), Average 2 (us) Port #1, Vector #7, Core # 3, IST Latency: Maximum 8 (us), Average 2 (us) Port #1, Vector #8, Core # 4, IST Latency: Maximum 12 (us), Average 2 (us) Port #2, Vector #0, Core # 2, IST Latency: Maximum 3 (us), Average 2 (us) Port #2, Vector #1, Core # 3, IST Latency: Maximum 4 (us), Average 2 (us) Port #2, Vector #2, Core # 4, IST Latency: Maximum 8 (us), Average 2 (us) Port #2, Vector #3, Core # 5, IST Latency: Maximum 8 (us), Average 2 (us) Port #2, Vector #4, Core # 6, IST Latency: Maximum 11 (us), Average 2 (us) Port #2, Vector #5, Core # 7, IST Latency: Maximum 12 (us), Average 2 (us) Port #2, Vector #6, Core # 2, IST Latency: Maximum 3 (us), Average 2 (us) Port #2, Vector #7, Core # 3, IST Latency: Maximum 8 (us), Average 2 (us) Port #2, Vector #8, Core # 4, IST Latency: Maximum 12 (us), Average 2 (us) Port #3, Vector #0, Core # 2, IST Latency: Maximum 3 (us), Average 2 (us) Port #3, Vector #1, Core # 3, IST Latency: Maximum 4 (us), Average 2 (us) Port #3, Vector #2, Core # 4, IST Latency: Maximum 8 (us), Average 2 (us) Port #3, Vector #3, Core # 5, IST Latency: Maximum 8 (us), Average 2 (us) Port #3, Vector #4, Core # 6, IST Latency: Maximum 11 (us), Average 2 (us) Port #3, Vector #5, Core # 7, IST Latency: Maximum 12 (us), Average 2 (us) Port #3, Vector #6, Core # 2, IST Latency: Maximum 3 (us), Average 2 (us) Port #3, Vector #7, Core # 3, IST Latency: Maximum 8 (us), Average 2 (us) Port #3, Vector #8, Core # 4, IST Latency: Maximum 12 (us), Average 2 (us)
Port #: The number of port from which the interrupts generate.
Vector #: The MSI-X vector number through which the interrupts pass the PCIe bus.
Core #: The processor/core number to which the interrupt is targeted.
IST Latency: The latency (in micro-seconds) from interrupt event setting by main thread to its IST handling. This latency includes hardware (MMIO read/write, PCIe, MSI-X, etc.) latency and software (ISR, IST) latency. Maximum is the maximum latency value among the number of loops. Average is the averaged latency values among the number of loops.
